SMD STU432S Logic Level MOS N 40V 50A 50W 0.009R TO-252

N-Channel Logic Level Enhancement Mode Field Effect Transistor

Drain-Source Voltage VDSS 40 V
Drain Current ID(Tc=25?) 50 A
Drain Current ID(Tc=70?) 40 A
Drain Current - Pulsed IDM 147 A
Gate-Source Voltage VGSS ±20 V
Single Pulsed Avalanche Energy EAS 130 mJ
Total Power Dissipation PD(Tc=25?) 42 W
Operating and Storage Temperature Range TJ,TSTG -55 to 150 ?

Drain-Source Breakdown Voltage BVDSS VGS=0V ID=250?A 40 V
Zero Gate Voltage Drain Current IDSS VDS=32V VGS=0V 1.0 ?A
Gate-Body Leakage Current
Forward IGSS VGS=±20V VDS=0V ±0.1 ?A
Gate Threshold Voltage VGS(th) VDS=VGS ID=250?A 1.25 1.6 3.0 V
Static Drain-Source
On-Resistance RDS(on)
VGS=10V ID=10A 7 9 m?
VGS=4.5V ID=5A 9 11 m?
Forward Transconductance gFS VDS=10V ID=10A 28 S
Drain-Source Diode Forward
Voltage VSD VGS=0V IS=20A 0.91 1.3 V
Input Capacitance Ciss
VDS=15V VGS=0V
f=1.0MHz
1130
Output Capacitance Coss 240 pF
Reverse Transfer Capacitance Crss 145
Turn-On Delay Time td(on)
VDD=15V ID=1.0A
VGS=10V RG=3.3?
18
ns
Turn-On Rise Time tr 22
Turn-Off Delay Time td(off) 61
Turn-Off Fall Time tf 9.6